Silterra Malaysia has laid out its three-stage plan to pump up capacity for process technologies ranging from 0.18-micron to 65nm, including plans to build a new 20k-25k WPM 300mm wafer fab, at a total cost of $1.5-2.0 billion.
Last month the foundry announced it was extending an existing process technology deal with European R&D consortium IMEC, to create a foundry-compatible 90nm CMOS process technology based on IMEC's process, with intention to scale to 65nm and develop a 110nm derivat
ive in parallel. That work will involve fine-tuning the 90nm process at IMEC's facility in Leuven, Belgium, targeting production-readiness by 2H08 or perhaps sooner.
Now, Silterra has ratcheted up its plans, with a three-stage expansion to accelerate growth over the next few years. Phase 1 will involve installing new capacity for 0.18-0.13-0.11 micron processes up to 40,000 wafers/month, as well as a small portion (1000-2000 wafers/month) of 90nm capacity installed for small volume production. These technologies are capable of mixed analog/digital, high voltage, RFCMOS, and low power designs, the company said.
Phase 2 of the foundry's plan will be to acquire a 200mm wafer fab. Phase 3 is to build a 300mm/90-65nm fab, with initial capacity of 20,000-25,000 wafers/month, Silterra said. By the end of the three-stage expansion plans, Silterra says will have a total capacity of 100k-120k wafers/month (200mm equivalent), spanning process technologies from 0.18-micron down to 65nm, a position in which it expects to be "a significant player in the pure play wafer foundry business." Total cost is projected to be about $1.5-$2.0 billion, with funds raised from existing investors (Malaysian government holding company Khazanah has a 90% stake) and outside parties.
"Silterra has a world class technology development team and we have developed very competitive technologies in the areas of mixed analog/digital, High Voltage and RF. We need to have additional capacity to support th